uz80as (Micro Z80 assembler) 1.09

Table of Contents

Micro Z80 assembler

This manual is for uz80as (Micro Z80 assembler) version 1.09 (updated 29 September 2018).


1 About

uz80as is an assembler for the Zilog Z80 and several other microprocessors. It accepts source files with the same syntax accepted by the Telemark Cross Assembler (TASM), with only minor differences.

Currently, uz80as can assemble for these microprocessors:

uz80as is free software.

The latest version of the program, source code and documentation can be found at http://jorgicor.sdfeu.org/uz80as.

For bug reports and suggestions, you can write to Jorge Giner at jorge.giner@hotmail.com .


2 Source syntax

Each line of the source file must be a an assembler statement or a preprocessor directive. Mathematical expressions can be used where a number is expected.


2.1 Statements

Each assembler statement must follow this format:

label operation operands comment

For example:

START	LD	A,5	; Load 5 into A

Everything that starts with an alphabetic character at the first column is considered a label.

A label must be separated by the rest of fields on the line by a space, tab or a colon ‘:’.

The operation can be a microprocessor instruction or an assembler directive (assembler directives start with a dot ‘.’).

Assembler directives can start at column 1, as they start with a dot ‘.’ and cannot be taken for a label. But a microprocessor instruction cannot start at column 1, or it would be taken as a label.

The operation must be separated by the operands (if any) with a space.

The rest of the line is the operands field until we reach the end of line or a semicolon ‘;’.

If we find a semicolon ‘;’ character at any position, the rest of the line is ignored.

All of these fields are optional except the operands field which, if present, must be preceded always by an operation field.

These are examples of statements:

; Program version 3
        .ORG 4000
LABEL   LD A,5
        ADD 6          ; Add 6
MEM     .FILL 2
.END    ; End of program

A backslash character ‘\’ can be used to simulate a new line. Then it is possible to put one or more statements on the same line:

	LD A,B\ LD B,C\ LD C,A

Remember that, as the backslash character simulates a new line, if the first character after it is alphabetic, it will be considered as a label. That is why we leave a space after the backslash in the example above.


2.1.1 Label field

The label field must start with an character from ‘A’ to ‘Z’. The next characters, if any, must be letters, numbers, underscores ‘_’ or periods ‘.’. Any other character terminates the label, and it must be a space, a tab or a colon ‘:’.

A label with more than 31 characters will issue an error.

Labels are case sensitive, so ‘START’ is different from ‘start’.

Each label has a value, which is:


2.1.2 Operation field

The operation field is a microprocessor instruction opcode (like ADD, SUB, CALL, etc) or an assembler directive (like .ORG, .EQU, etc). If it is a microprocessor instruction, it cannot start at the first column of the line, because in that case it would be considered a label. Assembler directives can start at any column as they start with a dot ‘.’.


2.1.3 Operands field

The operands field contains the operands for the instruction or the arguments of assembler directives. They can involve expressions, addressing modes, etc.


2.1.4 Comment field

A comment starts with a semicolon ‘;’ character and extends to the end of the line. It can be the only field on a line.


2.2 Expressions

Wherever a number is accepted in the operands of an instruction or directive, you can use an expression instead. An expression is formed using labels, constants, the program counter symbol, operators and parenthesis.


2.2.1 Numeric constants

A decimal numeric constant is expressed normally by the decimal number, optionally followed by the ‘D’ suffix.

An hexadecimal constant is expressed by using the ‘$’ prefix or by using the ‘H’ suffix. It can be formed by the digits from ‘0’ to ‘9’ and the letters from ‘A’ to ‘F’. Note that an hexadecimal constant that uses the suffix form and starts with a letter must be prefixed with a ‘0’ digit or it will be taken as a label.

An octal constant is expressed by using the ‘@’ prefix or by using the ‘O’ suffix. It can be formed by the digits from ‘0’ to ‘7’.

Binary constants are expressed using the ‘%’ prefix or by using the ‘B’ suffix.

All the letters for hexadecimal constants or suffixes can be in lower case as well.

For example, all these values represent the decimal number 255, using different notations:

Decimal         255 or 255D
Hexadecimal     $FF or 0FFH
Octal           @377 or 377O
Binary          %11111111 or 11111111B

2.2.2 Character constants

Character constants are single characters enclosed in single quotes, for example: ’c’. The ASCII code of the character is used as the value. Non-printable characters cannot be expressed this way, but you can use the .TEXT directive instead.


2.2.3 String constants

String constants are one or more characters enclosed in double quotes, for example: "This is a string." . String constants are not allowed in expressions but can be used with certain directives, like .TITLE, .TEXT, .BYTE, .DB, .WORD and .DW. String constants can contain escape sequences to represent non-printable characters. An escape sequence starts with the backslash ‘\’ character:

\n

Line feed.

\r

Carriage return.

\b

Backspace.

\t

Tab.

\f

Form feed.

\\

Backslash.

\"

Double quote.

You can express any other character by using the backslash ‘\’ followed by an octal constant using exactly 3 digits. For example, \377 represents the character value 255, and is the maximum octal value representable using a backslash.

Examples:

"This ends with a newline.\n"
"\tThe name is \"Bye Bug\"."

2.2.4 Program counter

In an expression you can use the value of the current program counter which is the memory address that will be assigned to the line we are assembling. You can use the dollar character ‘$’ or the asterisk ‘*’ to represent the current program counter.

For example:

START  LD HL,START

is equivalent to

START  LD HL,$

2.2.5 Operators

All operations are done using at least 32 bit signed precision. An expression is evaluated left to right and there is no operator precedence. Use parenthesis if you want to change the precedence. For example:

1 + 2*3 + 4

will be evaluated as:

((1 + 2) * 3) + 4

Use parenthesis to indicate the desired order of evaluation:

1 + (2*3) + 4

Summary of operators:

+

Addition.

-

Subtraction or negation.

*

Multiplication.

/

Integer division.

%

Modulo.

<<

Logical left shift.

>>

Arithmetic right shift (the sign bit fills new positions).

~

One’s complement (invert all bits).

= or ==

Equal. The result is 1 if equal, 0 if not.

!=

Not equal. The result is 1 if not equal, 0 if equal.

<

Less than. The result is 1 if a < b, 0 otherwise.

<=

Less than or equal. The result is 1 if a <= b, 0 otherwise.

<

Greater than. The result is 1 if a > b, 0 otherwise.

<=

Greater than or equal. The result is 1 if a >= b, 0 otherwise.

&

Binary ‘AND’.

|

Binary ‘OR’.

^

Binary ‘XOR’.

For the shift operators >> and <<, the second operand specifies the number of bits to shift the first operand.


2.3 Assembler directives

The assembler directives are distinguished from the microprocessor instructions because they begin with a dot character ‘.’. They are commands to control the assembly process.


2.3.1 BLOCK

[label] .BLOCK expr

expr is evaluated and its value added to the current program counter. Thus .BLOCK n is equivalent to .ORG $+n.


2.3.2 BYTE

[label] .BYTE expr [, expr ...]

The .BYTE directive is supplied with one or more expressions separated by commas. Each expr can be a numeric expression or a string constant. If the expression is numeric, the lower eight bits of the result are output to the object file. If the expression is a string, for each character its ‘ASCII’ value is output to the object file.

START .BYTE 'a', "hello", 5 - START

Note that the program counter symbol used in any of the expressions refers to the value the program counter had at the beginning of the line, and not at the start of each expression.

You can use .DB as an alternative name for .BYTE.


2.3.3 CHK

[label] .CHK expr

The checksum directive, takes all the bytes from the address expr up to the current address, and adds them. The least significant byte of the result is output to the object file. The address defined by expr must be in the range [0, current program counter[.

For example, this will output in the object file the bytes 1, 2, 3, 4 and 10:

START   .DB 1, 2, 3, 4
        .CHK START

2.3.4 CODES

Enables the generation of line numbers, opcodes, etc. in the listing file. This is enabled by default, but can be disabled using the .NOCODES directive.


2.3.5 DB

.DB is an alternate name for .BYTE.


2.3.6 DW

.DW is an alternate name for .WORD.


2.3.7 ECHO

[label] .ECHO expr
[label] .ECHO string

Outputs to the console (stderr) an expression value or a string.

For example,

.ECHO "The code size is "
.ECHO PRG_END - PRG_START
.ECHO " bytes long.\n"

may result in:

The program size is 237 bytes long.

2.3.8 EJECT

The .EJECT directive is accepted but not implemented. In TASM, forces a new page in the listing file.


2.3.9 END

[label]	.END [addr]

The .END directive should be the last one in the program. It is accepted only for compatibility with TASM but, if not used, we will only issue a warning. If it is present, it is an error to use any directive or instruction that generates code after it. It is an error to have more than one .END directive.


2.3.10 EQU

label .EQU expr

Normally, a label takes the value of the current program counter, but you can assign the result of an expression to a label. The label is mandatory in this case.

An alternative syntax uses the equal sign ‘=’ instead of .EQU:

label = 25

2.3.11 EXPORT

[label] .EXPORT label [,label ...]

The .EXPORT directive is accepted but not implemented.


2.3.12 FILL

[label] .FILL number_of_bytes [, fill_value]

Outputs number_of_bytes bytes to the output file. The value output to each byte is the least significant byte of fill_value. If no fill_value is supplied, the value 255 is used. It is an error to supply a negative number_of_bytes.


2.3.13 LIST

Turns on the output to the listing file. This is the default. Use .NOLIST to disable it.


2.3.14 LSFIRST

Turns on little endian mode. When a .WORD directive is found, it will take the 16 lower significant bits of the value, and from these the least significant byte will be output first to the object file, then the most significant byte. This is the default. Use .MSFIRST to change this behavior.

This example will output the byte ‘$34’ and then ‘$12’ to the output file.

        .LSFIRST
        .WORD $1234

2.3.15 MSFIRST

Turns on big endian mode. When a .WORD directive is found, it will take the 16 lower significant bits of the value, and from these the most significant byte will be output first to the object file, then the least significant byte. Use .LSFIRST to change this behavior.

This example output the byte ‘$12’ and then ‘$34’ to the output file.

        .MSFIRST
        .WORD $1234

2.3.16 NOCODES

Disables the generation of line numbers, opcodes, etc. in the listing file. Use .CODES to enable it again.


2.3.17 NOLIST

Turns off the output to the listing file. Use .LIST to enable it again.


2.3.18 NOPAGE

Accepted but currently ignored. See the PAGE directive as well.


2.3.19 ORG

[label] .ORG expr
[label] *=expr
[label] $=expr

Sets the program counter to the value of expr, which must be in the range [0, 65536]. expr can have references to the current program counter. For example, to advance the program counter to the next 256 boundary, we can use:

        .ORG ($ + 0FFH) & 0FF00H

Note that a label that is used with an .ORG directive will take the value of the program counter set by the .ORG.

You can use .ORG or the alternative forms *= and $=.


2.3.20 PAGE

Accepted but currently ignored. See the NOPAGE directive as well.


2.3.21 TEXT

[label] .TEXT string

Outputs the ASCII value of each character of the supplied string to the object file as a byte. Special characters can be embedded in the string using escape sequences. See String constants.

msg1    .TEXT "Enter the file name\n"
msg2    .TEXT "Say \"YES\" or \"NO\""

2.3.22 TITLE

Accepted but currently ignored.

        .TITLE "Program version 1.2"
        .TITLE "Subtitle"

2.3.23 WORD

[label] .WORD expr [, expr ...]

The .WORD directive accepts an expression or a list of expressions, and outputs the 16 bit value of each expression as two bytes. The default is to output the least significant byte first. You can change this behavior with the .MSFIRST and .LSFIRST directives.

Note that if you use the program counter symbol (‘$’) in any expression in a .WORD directive, it takes the value of the program counter at the beginning of the line, and not its value at the start of each expression. For example:

START   .EQU  0
        .WORD $1234, $

will output:

$34 $12 $00

and not:

$32 $12 $02

2.4 Preprocessor directives

The preprocessor directives can be used to assemble or not some parts of the source, to include text from other files to assemble, and to define macros that can cause text substitution.


2.4.1 DEFINE

#DEFINE macro_name[(arg_label [, arg_label ...])] [macro_definition]

The #DEFINE directive is used to define a macro name. Macro names can be used for text substitution. For example, you can define a label to be expanded to arbitrary text prior compilation:

#DEFINE STARTLO (START & 255)

        .DB STARTLO+1

When the assembler finds STARTLO, it will substitute it by the text (START & 255), so it will finally assemble this text:

        .DB (START & 255)+1

The substitution is recursive. For example:

#DEFINE STARTLO (START & 255)
#DEFINE STARTLO_PLUS_1 (STARTLO+1)

        .DB STARTLO_PLUS_1

This will expand first to:

        .DB (STARTLO+1)

And then to:

        .DB ((START & 255)+1)

Note that you can define a macro label that expands to no text:

#DEFINE VOID

        .DB 5
        VOID
        .DB 6

And you can make synonyms for directives to, for example, allow to compile the syntax from other assemblers. For example, imagine an assembler which does not use directives that begin with a dot as we do. To assemble a source that was written for that assembler with uz80as, you can use a set of defines at the beginning of your source file, and use them later:

#DEFINE DB .DB
#DEFINE DW .DW

        ...

        DB 5, 6, 7

You can define macros with arguments, for example:

#DEFINE ADDMAC(x,y) ((x)+(y))

        .DB ADDMAC(5,6)

This works first by taking the text of the ADDMAC macro:

((x)+(y))

and then searches for x in this text and substitutes it by 5. Next, finds y and substitutes it by 6.

((5)+(6))

Finally, the resulting text is substituted in the original location:

        .DB ((5)+(6))

Note that if you do not supply a parameter, nothing will be substituted:

        .DB ADDMAC(5)

will expand into:

        .DB ((5)+(y))

2.4.2 DEFCONT

#DEFCONT can be used to add more text to the previous defined macro. The macro text will always form an unique line, so remember to use the backslash character if you are forming multiline statements:

#DEFINE ADDMAC(x,y)     LD A,x
#DEFCONT                \ LD B,y
#DEFCONT                \ ADD B

2.4.3 INCLUDE

#INCLUDE "filename"

The #INCLUDE directive is used to include the text of another file to be assembled.

For example, if the file ‘common.h’ is:

        .DB 5

and the file ‘prg.asm’ is:

#include "common.h"
        .DB 6

the assembler will compile

        .DB 5
        .DB 6

2.4.4 IF

#IF expr

The #IF directive evaluates the supplied expression. If the value of the expression is zero, the next lines are ignored by the assembler, until an #ENDIF or an #ELSE directive is found.

If the value of the expression is not zero, the next lines are assembled normally, until an #ENDIF or #ELSE directive is found. In this case, if we find an #ELSE directive, the next lines after the #ELSE will be ignored.

In this example, as the expression evaluates to something different than zero, the line LD A,1 will be assembled and LD A,0 ignored:

ASSEMLE .EQU 1

#IF ASSEMBLE
        LD A,1
#ELSE
        LD A,0
#ENDIF

On the other hand, here the opposite will happen:

ASSEMLE .EQU 1

#IF !ASSEMBLE
        LD A,1
#ELSE
        LD A,0
#ENDIF

Note that #IF directives can be nested:

TRUE  .EQU 1
FALSE .EQU 0

#IF TRUE
        #IF FALSE
                LD A,0
        #ELSE
                LD A,1
        #ENDIF
#ELSE
        #IF TRUE
                LD A,2
        #ELSE
                LD A,3
        #ENDIF
#ENDIF

In this example, this code will be assembled:

        LD A,1

2.4.5 IFDEF

#IFDEF macro_name

#IFDEF is like #IF, but tests if a macro name has been defined.

#DEFINE SPECTRUM

#IFDEF SPECTRUM
        CALL spectrum_fun
#ELSE
        CALL amstrad_fun
#ENDIF

will assemble:

        CALL spectrum_fun

2.4.6 IFNDEF

#IFNDEF is like #IFDEF, but tests if a macro name has not been defined.


2.4.7 ELSE

Used to end a section that began with an #IF, #IFDEF or IFNDEF directive.


2.4.8 ENDIF

Used to end a section that began with an #IF, #IFDEF, IFNDEF or #ELSE directive.


3 Reference


3.1 Invoking uz80as

uz80as [OPTION]... ASM_FILE [OBJ_FILE [LST_FILE]]

To assemble program.asm you can use:

uz80as program.asm

If there are no errors, this will generate the file program.obj with the binary machine code of the program. Also, the file program.lst will be generated with the listing of the source program, plus more info like line numbers, the value of the program counter at each line, the generated machine code in hexadecimal, etc.

You can give another names to the object and listing files by specifying their names after the name of the source file. For example, this will generate the object file with the name program.bin and the listing file with the name list.txt:

uz80as program.asm program.bin list.txt

Additional command line options can be used before the these arguments. They are:

-h, --help

Display usage information and exit.

-v, --version

Display version information and exit.

-f nn, --fill n

By default, the entire memory addressable (64K) is filled by zero. You can specify a different value to fill the memory. 'nn' must be formed by two hexadecimal digits. For example, to fill the memory with the value 255 decimal, use '-f FF'.

-dmacro, --define macro

Define a macro. If the macro is simply a label, you can use -dLABEL. If it is a macro for text substitution, you have to enclose the macro definition in double quotes. For example: -d"MUL(a,b) (a*b)".

-q, --quiet

Disables the generation of the listing file.

-x, --extended

Accept an alternative syntax for some instructions.

-u, --undocumented

Accept undocumented instructions.

-t, --target target

Selects the target microprocessor. The default is z80. See --list-targets to know the targets accepted.

-e, --list-targets

Displays a list of the targets accepted and a brief description.


3.2 Implementation-defined features

Limits:

In the places where we can specify an expression, sometimes we require that the labels referenced in the expression have already a well defined value in the first pass of the assembler. The following directives do not allow to specify a label not already defined at the point where the directive appears in the first pass: #IF, .BLOCK, .END, .EQU, .FILL (number of positions), .ORG.


3.3 Differences with TASM


4 Targets

For every instruction accepted for every target:


4.1 z80 target

The z80 target selects the Zilog Z80 instruction set. These are the instructions accepted:

ADC (HL)ADC A,(HL)ADC A,e8ADC HL,BC
ADC HL,DEADC HL,HLADC HL,SPADC e8
ADD (HL)ADD (IXi)ADD (IYi)* ADD A
* ADD AADD AADD A,(HL)ADD A,(IXi)
ADD A,(IYi)* ADD A,A* ADD A,AADD A,A
* ADD A,B* ADD A,BADD A,B* ADD A,C
* ADD A,CADD A,C* ADD A,D* ADD A,D
ADD A,D* ADD A,E* ADD A,EADD A,E
ADD A,H* ADD A,IXH* ADD A,IXL* ADD A,IYH
* ADD A,IYLADD A,LADD A,e8* ADD B
* ADD BADD B* ADD C* ADD C
ADD C* ADD D* ADD DADD D
* ADD E* ADD EADD EADD H
ADD HL,BCADD HL,DEADD HL,HLADD HL,SP
ADD IX,BCADD IX,DEADD IX,IXADD IX,SP
* ADD IXH* ADD IXLADD IY,BCADD IY,DE
ADD IY,IYADD IY,SP* ADD IYH* ADD IYL
ADD LADD e8AND (HL)AND A,(HL)
AND A,e8AND e8BIT b3,(HL)BIT b3,(IXi)
BIT b3,(IYi)BIT b3,ABIT b3,BBIT b3,C
BIT b3,DBIT b3,EBIT b3,HBIT b3,L
CALL C,eCALL M,eCALL NC,eCALL NZ,e
CALL P,eCALL PE,eCALL PO,eCALL Z,e
CALL eCCFCP (HL)CP A,(HL)
CP A,e8CP e8CPDCPDR
CPICPIRCPLDAA
DEC (HL)DEC BCDEC BCDEC DE
DEC DEDEC HLDEC HLDEC SP
DEC SPDIDJNZ r8EI
EX (SP),BCEX (SP),DEEX (SP),HLEX (SP),HL
EX (SP),SPEX AF,AF’EX DE,HLEXX
HALTIM t* IN (C)IN A,(C)
IN A,(e8)IN B,(C)IN C,(C)IN D,(C)
IN E,(C)IN F,(e)IN H,(C)IN L,(C)
INC (HL)INC (IXi)INC (IYi)* INC A
* INC AINC A* INC B* INC B
INC BINC BCINC BC* INC C
* INC CINC C* INC D* INC D
INC DINC DEINC DE* INC E
* INC EINC EINC HINC HL
INC HL* INC IXH* INC IXL* INC IYH
* INC IYLINC LINC SPINC SP
INDINDRINIINIR
JP (BC)JP (DE)JP (HL)JP (HL)
JP (SP)JP C,eJP M,eJP NC,e
JP NZ,eJP P,eJP PE,eJP PO,e
JP Z,eJP eJR C,r8JR NC,r8
JR NZ,r8JR Z,r8JR r8LD (BC),A
LD (DE),ALD (HL),ALD (HL),BLD (HL),C
LD (HL),DLD (HL),ELD (HL),HLD (HL),L
LD (HL),e8LD (IXi),ALD (IXi),BLD (IXi),C
LD (IXi),DLD (IXi),ELD (IXi),HLD (IXi),L
LD (IXi),e8LD (IYi),e8LD (e),ALD (e),BC
LD (e),BCLD (e),DELD (e),DELD (e),HL
LD (e),HLLD (e),HLLD (e),SPLD (e),SP
LD A,(BC)LD A,(DE)LD A,(HL)LD A,(e)
LD A,ILD A,R* LD A,e8* LD A,e8
LD A,e8LD B,(HL)LD B,(IXi)LD B,(IYi)
* LD B,A* LD B,ALD B,A* LD B,B
* LD B,BLD B,B* LD B,C* LD B,C
LD B,C* LD B,D* LD B,DLD B,D
* LD B,E* LD B,ELD B,ELD B,H
* LD B,IXH* LD B,IXL* LD B,IYH* LD B,IYL
LD B,L* LD B,e8* LD B,e8LD B,e8
LD BC,(e)LD BC,(e)LD BC,eLD BC,e
LD C,(HL)* LD C,e8* LD C,e8LD C,e8
LD D,(HL)* LD D,e8* LD D,e8LD D,e8
LD DE,(e)LD DE,(e)LD DE,eLD DE,e
LD E,(HL)* LD E,e8* LD E,e8LD E,e8
LD H,(HL)LD H,e8LD HL,(e)LD HL,(e)
LD HL,(e)LD HL,eLD HL,eLD I,A
* LD IXH,e8* LD IXL,e8* LD IYH,e8* LD IYL,e8
LD L,(HL)LD L,e8LD R,ALD SP,(e)
LD SP,(e)LD SP,BCLD SP,DELD SP,HL
LD SP,HLLD SP,SPLD SP,eLD SP,e
LDDLDDRLDILDIR
NEGNOPOR (HL)OR A,(HL)
OR A,e8OR e8OTDROTIR
* OUT (C),0OUT (C),AOUT (C),BOUT (C),C
OUT (C),DOUT (C),EOUT (C),HOUT (C),L
OUT (e8),AOUTDOUTIPOP AF
POP BCPOP BCPOP DEPOP DE
POP HLPOP HLPOP SPPUSH AF
PUSH BCPUSH BCPUSH DEPUSH DE
PUSH HLPUSH HLPUSH SPRES b3,(HL)
* RES b3,(IXi),A* RES b3,(IXi),B* RES b3,(IXi),C* RES b3,(IXi),D
* RES b3,(IXi),E* RES b3,(IXi),H* RES b3,(IXi),LRET
RET CRET MRET NCRET NZ
RET PRET PERET PORET Z
RETIRETNRL (HL)RLA
RLC (HL)RLC (IXi)* RLC (IXi),A* RLC (IXi),B
* RLC (IXi),C* RLC (IXi),D* RLC (IXi),E* RLC (IXi),H
* RLC (IXi),LRLC (IYi)RLC ARLC B
RLC CRLC DRLC ERLC H
RLC LRLCARLDRR (HL)
RRARRC (HL)RRCARRD
RST sSBC (HL)SBC A,(HL)SBC A,e8
SBC HL,BCSBC HL,DESBC HL,HLSBC HL,SP
SBC e8SCFSET b3,(HL)* SET b3,(IXi),A
* SET b3,(IXi),B* SET b3,(IXi),C* SET b3,(IXi),D* SET b3,(IXi),E
* SET b3,(IXi),H* SET b3,(IXi),LSLA (HL)* SLL (HL)
* SLL (IXi)* SLL (IXi),A* SLL (IXi),B* SLL (IXi),C
* SLL (IXi),D* SLL (IXi),E* SLL (IXi),H* SLL (IXi),L
* SLL (IYi)* SLL A* SLL B* SLL C
* SLL D* SLL E* SLL H* SLL L
SRA (HL)SRL (HL)SUB (HL)SUB A,(HL)
SUB A,e8SUB e8XOR (HL)XOR A,(HL)
XOR A,e8XOR e8

Where:


4.1.1 z80 extended syntax

Note that in the official Zilog documentation, some of the arithmetic group of instructions take the A register as first argument: ADD, ADC and SBC. Others do not: SUB, AND, OR, XOR and CP. So you write:

	ADD A,B

and do not write

	ADD B

And you write:

	SUB B

but do not write

	SUB A,B

By default, it is an error to use the unofficial forms of these instructions, but you can enable them by specifying the -x option at the command line. With this option enabled, you can write any of these instructions with or without the A register as the first argument, like this:

	ADD A,B
	ADD B
	SUB A,B
	SUB B

For compatibility with other assemblers, it is better to keep the official syntax.


4.2 hd64180 target

The hd64180 target selects the Hitachi HD64180 instruction set. The instructions accepted are the same as for the z80 target (except undocumented instructions) plus these new instructions:

IN0 A,(e8)IN0 B,(e8)IN0 C,(e8)IN0 D,(e8)
IN0 E,(e8)IN0 H,(e8)IN0 L,(e8)MLT BC
MLT DEMLT HLMLT SPOTDM
OTDMROTIMOTIMROUT0 (e8),A
OUT0 (e8),BOUT0 (e8),COUT0 (e8),DOUT0 (e8),E
OUT0 (e8),HOUT0 (e8),LSLPTST (HL)
TST ATST BTST CTST D
TST ETST HTST LTST e8
TSTIO e8

4.2.1 hd64180 extended syntax

See z80 extended syntax.


4.3 gbcpu target

The gbcpu target selects the Sharp LR35902 CPU used in the Nintendo Gameboy. These are the instructions accepted:

ADC (HL)ADC A,(HL)ADC A,e8ADC e8
ADD (HL)ADD AADD A,(HL)ADD A,A
ADD A,BADD A,CADD A,DADD A,E
ADD A,HADD A,LADD A,e8ADD B
ADD CADD DADD EADD H
ADD HL,BCADD HL,DEADD HL,HLADD HL,SP
ADD LADD SP,e8ADD e8AND (HL)
AND A,(HL)AND A,e8AND e8BIT b3,(HL)
BIT b3,ABIT b3,BBIT b3,CBIT b3,D
BIT b3,EBIT b3,HBIT b3,LCALL C,e
CALL NC,eCALL NZ,eCALL Z,eCALL e
CCFCP (HL)CP A,(HL)CP A,e8
CP e8CPLDAADEC (HL)
DEC BCDEC DEDEC HLDEC SP
DIEIHALTINC (HL)
INC AINC BINC BCINC C
INC DINC DEINC EINC H
INC HLINC LINC SPJP (HL)
JP C,eJP NC,eJP NZ,eJP Z,e
JP eJR C,r8JR NC,r8JR NZ,r8
JR Z,r8JR r8LD (BC),ALD (C),A
LD (DE),ALD (HL),ALD (HL),BLD (HL),C
LD (HL),DLD (HL),ELD (HL),HLD (HL),L
LD (HL),e8LD (HLD),ALD (HLI),ALD (e),A
LD (e),SPLD A,(BC)LD A,(C)LD A,(DE)
LD A,(HL)LD A,(HLD)LD A,(HLI)LD A,(e)
LD A,e8LD B,(HL)LD B,ALD B,B
LD B,CLD B,DLD B,ELD B,H
LD B,LLD B,e8LD BC,eLD C,(HL)
LD C,e8LD D,(HL)LD D,e8LD DE,e
LD E,(HL)LD E,e8LD H,(HL)LD H,e8
LD HL,eLD L,(HL)LD L,e8LD SP,HL
LD SP,eLDH (e8),ALDH A,(e8)LDHL SP,e8
NOPOR (HL)OR A,(HL)OR A,e8
OR e8POP AFPOP BCPOP DE
POP HLPUSH AFPUSH BCPUSH DE
PUSH HLRES b3,(HL)RETRET C
RET NCRET NZRET ZRETI
RL (HL)RLARLC (HL)RLC A
RLC BRLC CRLC DRLC E
RLC HRLC LRLCARR (HL)
RRARRC (HL)RRCARST s
SBC (HL)SBC A,(HL)SBC A,e8SBC e8
SCFSET b3,(HL)SLA (HL)SRA (HL)
SRL (HL)STOPSUB (HL)SUB A,(HL)
SUB A,e8SUB e8SWAP (HL)XOR (HL)
XOR A,(HL)XOR A,e8XOR e8

Where:


4.3.1 gbcpu extended syntax

See z80 extended syntax.


4.4 dp2200 target

The dp2200 target selects the Datapoint 2200 version I instruction set.

Important: the Datapoint 2200 version I can only address 8K at maximum but uz80as at this moment only imposes a 64K limit.

These are the instructions accepted:

AC e8ACAACBACC
ACDACEACHACL
ACMAD e8ADAADB
ADCADDADEADH
ADLADMCALL eCFC e
CFP eCFS eCFZ eCP e8
CPACPBCPCCPD
CPECPHCPLCPM
CTC eCTP eCTS eCTZ e
EX ADREX BEEPEX BSPEX CLICK
EX COM1EX COM2EX COM3EX COM4
EX DATAEX DECK1EX DECK2EX RBK
EX REWNDEX SBEX SFEX STATUS
EX TSTOPEX WBKEX WRITEHALT
INPUTJFC eJFP eJFS e
JFZ eJMP eJTC eJTP e
JTS eJTZ eLA e8LAB
LACLADLAELAH
LALLAMLB e8LBA
LBCLBDLBELBH
LBLLBMLC e8LCA
LCBLCDLCELCH
LCLLCMLD e8LDA
LDBLDCLDELDH
LDLLDMLE e8LEA
LEBLECLEDLEH
LELLEMLH e8LHA
LHBLHCLHDLHE
LHLLHMLL e8LLA
LLBLLCLLDLLE
LLHLLMLMALMB
LMCLMDLMELMH
LMLND e8NDANDB
NDCNDDNDENDH
NDLNDMNOPOR e8
ORAORBORCORD
OREORHORLORM
RETURNRFCRFPRFS
RFZRTCRTPRTS
RTZSB e8SBASBB
SBCSBDSBESBH
SBLSBMSLCSRC
SU e8SUASUBSUC
SUDSUESUHSUL
SUMXR e8XRAXRB
XRCXRDXREXRH
XRLXRM

4.5 dp2200ii target

The dp2200ii target selects the Datapoint 2200 version II instruction set.

Important: the Datapoint 2200 version II can only address 16K at maximum but uz80as at this moment only imposes a 64K limit.

The instruction set accepted is the same as for the dp2200 target, plus these new instructions:

ALPHABETADIEI
POPPUSH

4.6 i4004 target

The i4004 target selects the Intel 4004 instruction set.

Important: the Intel 4004 can only address 4K at maximum but uz80as at this moment only imposes a 64K limit.

Note that the original Intel syntax was something like this:

LAB,   ISZ 5 255   \ this is a comment

At this moment, you will need to translate that to a syntax acceptable by uz80as, for instance:

LAB:   ISZ 5,255   ; this is a comment

However, we do accept the 0P, 1P, etc. notation to specify a register pair. These are the instructions accepted:

ADD b4ADMBBL b4CLB
CLCCMACMCDAA
DACDCLFIM 0P,e8FIM 1P,e8
FIM 2P,e8FIM 3P,e8FIM 4P,e8FIM 5P,e8
FIM 6P,e8FIM 7P,e8FIM p,e8FIN 0P
FIN 1PFIN 2PFIN 3PFIN 4P
FIN 5PFIN 6PFIN 7PFIN p
IACINC b4ISZ b4,e8JCN b4,e8
JIN 0PJIN 1PJIN 2PJIN 3P
JIN 4PJIN 5PJIN 6PJIN 7P
JIN pJMS eJUN eKBP
LD b4LDM b4NOPRAL
RARRD0RD1RD2
RD3RDMRDRSBM
SRC 0PSRC 1PSRC 2PSRC 3P
SRC 4PSRC 5PSRC 6PSRC 7P
SRC pSTCSUB b4TCC
TCSWMPWPMWR0
WR1WR2WR3WRM
WRRXCH b4

Where:


4.7 i4040 target

The i4040 target selects the Intel 4040 instruction set.

Important: the Intel 4040 can only address 8K at maximum but uz80as at this moment only imposes a 64K limit.

The instruction set accepted is the same as for the i4004 target, plus these new instructions:

AN6AN7BBSDB0
DB1DINEINHLT
LCROR4OR5RPM
SB0SB1

4.8 i8008 target

The i8008 target selects the Intel 8008 instruction set.

Important: the Intel 8008 can only address 16K at maximum but uz80as at this moment only imposes a 64K limit.

These are the instructions accepted:

ACAACBACCACD
ACEACHACI e8ACL
ACMADAADBADC
ADDADEADHADI e8
ADLADMCAL eCFC e
CFP eCFS eCFZ eCPA
CPBCPCCPDCPE
CPHCPI e8CPLCPM
CTC eCTP eCTS eCTZ e
DCBDCCDCDDCE
DCHDCLHLTINB
INCINDINEINH
INLINP b3JFC eJFP e
JFS eJFZ eJMP eJTC e
JTP eJTS eJTZ eLAB
LACLADLAELAH
LAI e8LALLAMLBA
LBBLBCLBDLBE
LBHLBI e8LBLLBM
LCALCBLCCLCD
LCELCHLCI e8LCL
LCMLDALDBLDC
LDDLDELDHLDI e8
LDLLDMLEALEB
LECLEDLEELEH
LEI e8LELLEMLHA
LHBLHCLHDLHE
LHHLHI e8LHLLHM
LLALLBLLCLLD
LLELLHLLI e8LLL
LLMLMALMBLMC
LMDLMELMHLMI e8
LMLNDANDBNDC
NDDNDENDHNDI e8
NDLNDMNOPORA
ORBORCORDORE
ORHORI e8ORLORM
OUT kRALRARRET
RFCRFPRFSRFZ
RLCRRCRST b3RTC
RTPRTSRTZSBA
SBBSBCSBDSBE
SBHSBI e8SBLSBM
SUASUBSUCSUD
SUESUHSUI e8SUL
SUMXRAXRBXRC
XRDXREXRHXRI e8
XRLXRM

Where:


4.9 i8021 target

The i8021 target selects the Intel 8021 instruction set.

These are the instructions accepted:

ADD A,#e8ADD A,@R0ADD A,@R1ADD A,R0
ADD A,R1ADD A,R2ADD A,R3ADD A,R4
ADD A,R5ADD A,R6ADD A,R7ADDC A,#e8
ADDC A,@R0ADDC A,@R1ADDC A,R0ADDC A,R1
ADDC A,R2ADDC A,R3ADDC A,R4ADDC A,R5
ADDC A,R6ADDC A,R7ANL A,#e8ANL A,@R0
ANL A,@R1ANL A,R0ANL A,R1ANL A,R2
ANL A,R3ANL A,R4ANL A,R5ANL A,R6
ANL A,R7ANLD P4,AANLD P5,AANLD P6,A
ANLD P7,ACALL eCLR ACLR C
CPL ACPL CDA ADEC A
DJNZ R0,e8DJNZ R1,e8DJNZ R2,e8DJNZ R3,e8
DJNZ R4,e8DJNZ R5,e8DJNZ R6,e8DJNZ R7,e8
IN A,P0IN A,P1IN A,P2INC @R0
INC @R1INC AINC R0INC R1
INC R2INC R3INC R4INC R5
INC R6INC R7JC e8JMP e11
JMPP @AJNC e8JNT1 e8JNZ e8
JT1 e8JTF e8JZ e8MOV @R0,#e8
MOV @R0,AMOV @R1,#e8MOV @R1,AMOV A,#e8
MOV A,@R0MOV A,@R1MOV A,R0MOV A,R1
MOV A,R2MOV A,R3MOV A,R4MOV A,R5
MOV A,R6MOV A,R7MOV A,TMOV R0,#e8
MOV R0,AMOV R1,#e8MOV R1,AMOV R2,#e8
MOV R2,AMOV R3,#e8MOV R3,AMOV R4,#e8
MOV R4,AMOV R5,#e8MOV R5,AMOV R6,#e8
MOV R6,AMOV R7,#e8MOV R7,AMOV T,A
MOVD A,P4MOVD A,P5MOVD A,P6MOVD A,P7
MOVD P4,AMOVD P5,AMOVD P6,AMOVD P7,A
MOVP A,@ANOPNOPORL A,#e8
ORL A,@R0ORL A,@R1ORL A,R0ORL A,R1
ORL A,R2ORL A,R3ORL A,R4ORL A,R5
ORL A,R6ORL A,R7ORLD P4,AORLD P5,A
ORLD P6,AORLD P7,AOUTL P0,AOUTL P1,A
OUTL P2,ARETRL ARLC A
RR ARRC ASTOP TCNTSTRT CNT
STRT TSWAP AXCH A,@R0XCH A,@R1
XCH A,R0XCH A,R1XCH A,R2XCH A,R3
XCH A,R4XCH A,R5XCH A,R6XCH A,R7
XCHD A,@R0XCHD A,@R1XRL A,#e8XRL A,@R0
XRL A,@R1XRL A,R0XRL A,R1XRL A,R2
XRL A,R3XRL A,R4XRL A,R5XRL A,R6
XRL A,R7

4.10 i8022 target

The i8022 target selects the Intel 8022 instruction set. The instruction set accepted is the same as for the i8021 target, plus these new instrucions:

DIS IDIS TCNTIEN IEN TCNTI
JNT0 e8JT0 e8RADRETI
SEL AN0SEL AN1

4.11 i8041 target

The i8041 target selects the Intel 8041 instruction set. The instruction set accepted is the same as for the i8021 target, except that these instructions are removed:

IN A,P0OUTL P0,A

And these instructions are added:

ANL P1,#e8ANL P2,#e8CLR F0CLR F1
CPL F0CPL F1DEC R0DEC R1
DEC R2DEC R3DEC R4DEC R5
DEC R6DEC R7DIS IDIS TCNTI
EN DMAEN FLAGSEN IEN TCNTI
IN A,DBBJB0 e8JB1 e8JB2 e8
JB3 e8JB4 e8JB5 e8JB6 e8
JB7 e8JF0 e8JF1 e8JNIBF e8
JNT0 e8JOBF e8JT0 e8MOV A,PSW
MOV PSW,AMOV STS,AMOVP3 A,@AORL P1,#e8
ORL P2,#e8OUT DBB,ARETRSEL RB0
SEL RB1

4.12 i8048 target

The i8048 target selects the Intel 8048 instruction set. The instruction set accepted is the same as for the i8041 target, except that these instructions are removed:

EN FLAGSEN DMAIN A,DBBJNIBF e8
JOBF e8MOV STS,AOUT DBB,A

And these instructions are added:

ANL BUS,#e8ENT0 CLKINS A,BUSJNI e8
MOVX @R0,AMOVX @R1,AMOVX A,@R0MOVX A,@R1
ORL BUS,#e8OUTL BUS,ASEL MB0SEL MB1

4.13 i8051 target

The i8051 target selects the Intel 8051 instruction set.

These are the instructions accepted:

ACALL e11ADD A,#e8ADD A,@R0ADD A,@R1
ADD A,R0ADD A,R1ADD A,R2ADD A,R3
ADD A,R4ADD A,R5ADD A,R6ADD A,R7
ADD A,e8ADDC A,#e8ADDC A,e8AJMP e11
ANL A,#e8ANL A,e8ANL C,/e8ANL C,e8
ANL e,AANL e8,#e8CJNE @R0,#e8,r8CJNE @R1,#e8,r8
CJNE A,#e8,r8CJNE A,e8,r8CJNE R0,#e8,r8CJNE R1,#e8,r8
CJNE R2,#e8,r8CJNE R3,#e8,r8CJNE R4,#e8,r8CJNE R5,#e8,r8
CJNE R6,#e8,r8CJNE R7,#e8,r8CLR ACLR C
CLR e8CPL ACPL CCPL e8
DA ADEC @R0DEC @R1DEC A
DEC R0DEC R1DEC R2DEC R3
DEC R4DEC R5DEC R6DEC R7
DEC e8DIV ABDJNZ R0,r8DJNZ R1,r8
DJNZ R2,r8DJNZ R3,r8DJNZ R4,r8DJNZ R5,r8
DJNZ R6,r8DJNZ R7,r8DJNZ e8,r8INC @R0
INC @R1INC AINC DPTRINC R0
INC R1INC R2INC R3INC R4
INC R5INC R6INC R7INC e8
JB e8,r8JBC e8,r8JC r8JMP @A+DPTR
JNB e8,r8JNC r8JNZ r8JZ r8
LCALL eLJMP eMOV @R0,#e8MOV @R0,A
MOV @R0,e8MOV @R1,#e8MOV @R1,AMOV @R1,e8
MOV A,#e8MOV A,e8MOV C,e8MOV DPTR,#e8
MOV R0,#e8MOV R0,AMOV R0,e8MOV R1,#e8
MOV R1,AMOV R1,e8MOV R2,#e8MOV R2,A
MOV R2,e8MOV R3,#e8MOV R3,AMOV R3,e8
MOV R4,#e8MOV R4,AMOV R4,e8MOV R5,#e8
MOV R5,AMOV R5,e8MOV R6,#e8MOV R6,A
MOV R6,e8MOV R7,#e8MOV R7,AMOV R7,e8
MOV e8,#e8MOV e8,@R0MOV e8,@R1MOV e8,A
MOV e8,CMOV e8,R0MOV e8,R1MOV e8,R2
MOV e8,R3MOV e8,R4MOV e8,R5MOV e8,R6
MOV e8,R7MOV e8,e8MOVC A,@A+DPTRMOVC A,@A+PC
MOVX @DPTR,AMOVX @R0,AMOVX @R1,AMOVX A,@DPTR
MOVX A,@R0MOVX A,@R1MUL ABNOP
ORL A,#e8ORL A,e8ORL C,/e8ORL C,e8
ORL e8,#e8ORL e8,APOP e8PUSH e8
RETRETIRL ARLC A
RR ARRC ASETB CSETB e8
SJMP r8SUBB A,#e8SUBB A,e8SWAP A
XCH A,e8XCHD A,@R0XCHD A,@R1XRL A,#e8
XRL A,e8XRL e8,#e8XRL e8,A

4.14 i8080 target

The i8080 target selects the Intel 8080. These are the instructions accepted:

ACI e8ADD AADD BADD C
ADD DADD EADD HADD L
ADD MADI e8ANI e8CALL e
CC eCM eCMACMC
CNC eCNZ eCP eCPE e
CPI e8CPO eCZ eDAA
DAD BDAD DDAD HDAD SP
DCR ADCR BDCR CDCR D
DCR EDCR HDCR LDCR M
DCX BDCX DDCX HDCX SP
DIEIHLTIN e8
INR AINR BINR CINR D
INR EINR HINR LINR M
INX BINX DINX HINX SP
JC eJM eJMP eJNC e
JNZ eJP eJPE eJPO e
JZ eLDA eLHLD eLXI B,e
LXI D,eLXI H,eLXI SP,eMOV A,M
MOV B,AMOV B,BMOV B,CMOV B,D
MOV B,EMOV B,HMOV B,LMOV B,M
MOV C,MMOV D,MMOV E,MMOV H,M
MOV L,MMOV M,AMOV M,BMOV M,C
MOV M,DMOV M,EMOV M,HMOV M,L
MVI A,e8MVI B,e8MVI C,e8MVI D,e8
MVI E,e8MVI H,e8MVI L,e8MVI M,e8
NOPORI e8OUT e8PCHL
POP BPOP DPOP HPOP PSW
RALRARRCRET
RLCRMRNCRNZ
RPRPERPORRC
RST b3RZSBI e8SHLD e
SPHLSTA eSTAX BSTAX D
STCSUI e8XCHGXRI e8
XTHL

4.15 i8085 target

The i8085 target selects the Intel 8085. The instruction set accepted is the same as for the i8080 target, plus these new instructions:

* ARHL* DSUB* JK e* JNK e
* JNUI e* JNX5 e* JUI e* JX5 e
* LDHI e8* LDSI e8* LHLX* RDEL
RIM* RSTV* SHLXSIM

Where:


4.16 mos6502 target

The mos6502 target selects the MOS Technology 6502. These are the instructions accepted:

ADC #e8ADC (e8),YADC (e8,X)ADC e
ADC e,XADC e,YAND #e8AND (e8),Y
AND (e8,X)AND eAND e,XAND e,Y
ASL AASL eASL e,XBCC r8
BCS r8BEQ r8BIT eBMI r8
BNE r8BPL r8BRKBVC r8
BVS r8CLCCLDCLI
CLVCMP #e8CMP (e8),YCMP (e8,X)
CMP eCMP e,XCMP e,YCPX #e8
CPX eCPY #e8CPY eDEC e
DEC e,XDEXDEYEOR #e8
EOR (e8),YEOR (e8,X)EOR eEOR e,X
EOR e,YINC eINC e,XINX
INYJMP (e)JMP eJSR e
LDA #e8LDA (e8),YLDA (e8,X)LDA e
LDA e,XLDA e,YLDX #e8LDX e
LDX e,YLDY #e8LDY eLDY e,X
LSR ALSR eLSR e,XNOP
ORA #e8ORA (e8),YORA (e8,X)ORA e
ORA e,XORA e,YPHAPHP
PLAPLPROL AROL e
ROL e,XROR AROR eROR e,X
RTIRTSSBC #e8SBC (e8),Y
SBC (e8,X)SBC eSBC e,XSBC e,Y
SECSEDSEISTA (e8),Y
STA (e8,X)STA eSTA e,XSTA e,Y
STX eSTX e8,YSTY eSTY e8,X
TAXTAYTSXTXA
TXSTYA

4.17 r6501 target

The r6501 target selects the Rockwell R6501. The instruction set accepted is the same as for the mos6502 target, plus these new instructions:

BBR0 e8,r8BBR1 e8,r8BBR2 e8,r8BBR3 e8,r8
BBR4 e8,r8BBR5 e8,r8BBR6 e8,r8BBR7 e8,r8
BBS0 e8,r8BBS1 e8,r8BBS2 e8,r8BBS3 e8,r8
BBS4 e8,r8BBS5 e8,r8BBS6 e8,r8BBS7 e8,r8
RMB0 e8RMB1 e8RMB2 e8RMB3 e8
RMB4 e8RMB5 e8RMB6 e8RMB7 e8
SMB0 e8SMB1 e8SMB2 e8SMB3 e8
SMB4 e8SMB5 e8SMB6 e8SMB7 e8

4.18 g65sc02 target

The g65sc02 target selects the California Micro Devices G65SC02. The instruction set accepted is the same as for the mos6502 target, plus these new instructions:

ADC (e8)AND (e8)BIT #e8BIT e,X
BRA r8CMP (e8)DEC AEOR (e8)
INC AJMP (e,X)LDA (e8)ORA (e8)
PHXPHYPLXPLY
SBC (e8)STA (e8)STZ eSTZ e,X
TRB eTSB e

4.19 r65c02 target

The r65c02 target selects the Rockwell R65C02. The instruction set accepted is the same as for the mos6502 target, plus the added instructions of the r6501 and g65sc02 targets.


4.20 r65c29 target

The r65c29 target selects the Rockwell R65C29, R65C00/21. The instruction set accepted is the same as for the r65c02 target, plus these new instructions:

MUL

4.21 w65c02s target

The w65c02s target selects the Western Design Center W65C02S. The instruction set accepted is the same as for the r65c02 target, plus these new instructions:

STPWAI

4.22 mc6800 target

The mc6800 target selects the Motorola 6800. These are the instructions accepted:

ABAADCA #e8ADCA >e16ADCA e
ADCA e8,XADCB #e8ADCB >e16ADCB e
ADCB e8,XADDA #e8ADDA >e16ADDA e
ADDA e8,XADDB #e8ADDB >e16ADDB e
ADDB e8,XANDA #e8ANDA >e16ANDA e
ANDA e8,XANDB #e8ANDB >e16ANDB e
ANDB e8,XASL e16ASL e8,XASLA
ASLBASR e16ASR e8,XASRA
ASRBBCC r8BCS r8BEQ r8
BGE r8BGT r8BHI r8BITA #e8
BITA >e16BITA eBITA e8,XBITB #e8
BITB >e16BITB eBITB e8,XBLE r8
BLS r8BLT r8BMI r8BNE r8
BPL r8BRA r8BSR r8BVC r8
BVS r8CBACLCCLI
CLR e16CLR e8,XCLRACLRB
CLVCMPA #e8CMPA >e16CMPA e
CMPA e8,XCMPB #e8CMPB >e16CMPB e
CMPB e8,XCOM e16COM e8,XCOMA
COMBCPX #e16CPX >e16CPX e
CPX e8,XDAADEC e16DEC e8,X
DECADECBDESDEX
EORA #e8EORA >e16EORA eEORA e8,X
EORB #e8EORB >e16EORB eEORB e8,X
INC e16INC e8,XINCAINCB
INSINXJMP e16JMP e8,X
JSR e16JSR e8,XLDAA #e8LDAA >e16
LDAA eLDAA e8,XLDAB #e8LDAB >e16
LDAB eLDAB e8,XLDS #e16LDS >e16
LDS eLDS e8,XLDX #e16LDX >e16
LDX eLDX e8,XLSR e16LSR e8,X
LSRALSRBNEG e16NEG e8,X
NEGANEGBNOPORAA #e8
ORAA >e16ORAA eORAA e8,XORAB #e8
ORAB >e16ORAB eORAB e8,XPSHA
PSHBPULAPULBROL e16
ROL e8,XROLAROLBROR e16
ROR e8,XRORARORBRTI
RTSSBASBCA #e8SBCA >e16
SBCA eSBCA e8,XSBCB #e8SBCB >e16
SBCB eSBCB e8,XSECSEI
SEVSTAA >e16STAA eSTAA e8,X
STAB >e16STAB eSTAB e8,XSTS >e16
STS eSTS e8,XSTX >e16STX e
STX e8,XSUBA #e8SUBA >e16SUBA e
SUBA e8,XSUBB #e8SUBB >e16SUBB e
SUBB e8,XSWITABTAP
TBATPATST e16TST e8,X
TSTATSTBTSXTXS
WAI

Where > forces the use of a 16 bit address.


4.23 mc6801 target

The mc6801 target selects the Motorola 6801. The instruction set accepted is the same as for the mc6800 target, plus these new instructions:

ABXADDD #e16ADDD >e16ADDD e
ADDD e8,XASLDBHS r8BLO r8
BRN r8JSR >e16JSR eLDD #e16
LDD >e16LDD eLDD e8,XLSL e16
LSL e8,XLSLDLSRDMUL
PSHXPULXSTD >e16STD e
STD e8,XSUBD #e16SUBD >e16SUBD e
SUBD e8,X

4.24 m68hc11 target

The m68hc11 target selects the Motorola 68HC11. The instruction set accepted is the same as for the mc6801 target, plus these new instructions:

ABYADCA e8,YADCB e8,YADDA e8,Y
ADDB e8,YADDD e8,YANDA e8,YANDB e8,Y
ASL e8,YASR e8,YBCLR e8,X,e8BCLR e8,Y,e8
BCLR e8,e8BITA e8,YBITB e8,YBRCLR e8,X,e8,r8
BRCLR e8,Y,e8,r8BRCLR e8,e8,r8BRSET e8,X,e8,r8BRSET e8,Y,e8,r8
BRSET e8,e8,r8BSET e8,X,e8BSET e8,Y,e8BSET e8,e8
CLR e8,YCMPA e8,YCMPB e8,YCOM e8,Y
CPD #e16CPD >e16CPD eCPD e8,X
CPD e8,YCPX e8,YCPY #e16CPY >e16
CPY eCPY e8,XCPY e8,YDEC e8,Y
DEYEORA e8,YEORB e8,YFDIV
IDIVINC e8,YINYJMP e8,Y
JSR e8,YLDAA e8,YLDAB e8,YLDD e8,Y
LDS e8,YLDX e8,YLDY #e16LDY >e16
LDY eLDY e8,XLDY e8,YLSL e8,Y
LSLALSLBLSR e8,YNEG e8,Y
ORAA e8,YORAB e8,YPSHYPULY
ROL e8,YROR e8,YSBCA e8,YSBCB e8,Y
STAA e8,YSTAB e8,YSTD e8,YSTOP
STS e8,YSTX e8,YSTY >e16STY e
STY e8,XSTY e8,YSUBA e8,YSUBB e8,Y
SUBD e8,YTESTTST e8,YTSY
TYSXGDXXGDY

5 Source guide


5.1 Modules


6 Copyright

This manual is for uz80as (Micro Z80 assembler) version 1.09 (updated 29 September 2018).

Copyright © 2018 Jorge Giner Cordero

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.